★ Flagship Product Line

Any-Layer HDI PCB

We're an any-layer HDI PCB manufacturer built for the hard stuff — 6th-order and above stacked-microvia constructions, laser vias down to 0.07 mm, and via-in-pad reliability, in low volume and fast turnaround.

Any-layer interconnect Laser via 0.07 mm Stacked / staggered µvia Via-in-pad (filled)
Any-Layer HDI PCB — signature cross-section

Key Capabilities

Any-layer · 6th-order & above HDI build-up
Down to 0.07 mm (70 µm) Laser microvia
6+ cycles Sequential lamination
Stacked & staggered Microvia structure
2.5 / 2.5 mil Min line / space
Over 20:1 Aspect ratio

Any-layer HDI is where high-density interconnect stops being a feature and becomes the whole board. As an any-layer HDI PCB manufacturer, we build constructions where every layer can carry laser-drilled microvias — stacked or staggered — to route the finest BGA pitches and the densest SoC breakouts.

Our in-house HDI process handles 6th-order build-ups and above, with up to six or more sequential lamination cycles, blind and buried vias, and via-in-pad with filled-and-capped vias for flat, reliable pads. Laser microvias go down to 0.07 mm, with minimum line width and spacing of 2.5/2.5 mil. We run high-speed and RF-grade laminates — Panasonic Megtron 6/7, Rogers, and mixed-dielectric stacks — held to IPC Class 3 / mil-spec acceptance.

We are built for low-volume, fast-turn prototypes and complex small runs — the difficult any-layer HDI work that high-volume houses turn away.

Technical Specifications

Verified production capability limits. = maximum achievable spec.

ParameterValue
HDI build-up (order) Any-layer, 6th-order and above
Microvia type Stacked & staggered
Laser microvia diameter Down to 0.07 mm (70 µm)
Sequential laminations 6+ cycles
Blind / buried vias Yes (multi-step)
Via fill Resin / copper filled & capped (via-in-pad)
Min line width / space 2.5 / 2.5 mil
Aspect ratio Over 20:1
Hole position tolerance ±0.025 mm
Layer count Up to 36 (pushing higher-order) layers
Materials Megtron 6/7, Rogers, PTFE, mixed-dielectric, high-Tg FR-4
Surface finishes ENIG, ENEPIG, immersion Ag/Sn, OSP, hard gold
Impedance control ±8% (±5 Ω at ≤50 Ω)
Acceptance IPC Class 3 / mil-spec

Engineering Highlights

  • Any-layer construction

    Laser microvias on every layer, stacked or staggered, for maximum routing density.

  • 6+ sequential laminations

    6th-order and above build-ups for the most demanding stackups.

  • Laser microvias to 0.07 mm

    Fine-pitch BGA and SoC breakout without compromise.

  • Via-in-pad, filled & capped

    Flat, void-free pads for reliable assembly.

Why any-layer HDI is hard

Each build-up order adds a lamination, a laser-drill step, and a plating cycle. Registration tightens with every layer, and stacked microvias must be filled flat enough to drill and plate the next. Getting 6th-order and above to yield is a process-control problem, not a spec sheet.

How we build it

Our HDI line runs sequential lamination, laser drilling to 0.07 mm, resin and copper via fill, and fine-line imaging at 2.5/2.5 mil — all in-house, so the hard steps stay under our control. IPC Class 3 / mil-spec, with high-speed and RF laminates including Megtron 6/7 and Rogers.

Applications

Smartphones and mobile, wearables, SoC / FPGA / processor breakout boards, medical imaging and monitoring, aerospace and defense modules, and high-density RF and baseband.

Material Selection

Any-layer HDI runs on high-Tg FR-4 for general builds, and on low-loss or RF laminates (Panasonic Megtron 6/7, Rogers) when the HDI also carries high-speed or RF signals. We hold the registration and via-fill process control thin HDI dielectrics demand. We confirm the exact material and availability with your design.

Design & DFM

  • Prefer staggered microvias where density allows; minimize consecutively stacked vias to protect thermal-cycling reliability.
  • Reserve via-in-pad (filled & capped) for the densest BGAs.
  • Keep the stackup symmetric to control warpage; reference high-speed signals to solid planes.
  • Send target impedances early — dielectric height and line width are set in the stackup.

Proven

On an HDI rigid-flex board for a wearable camera, an over-thick flex region had stalled the customer for two years; our engineers re-engineered the any-layer stackup and lifted assembly yield from 60% to 95%. HDI is an engineering problem, not just fabrication.

Beyond the datasheet

When your any-layer HDI design pushes past standard windows — extreme orders, exotic stackups, new materials — we don't decline. Our process engineers evaluate, prototype and co-develop a manufacturable solution with your team.

Frequently Asked Questions

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