High Layer Count PCB
A high layer count PCB manufacturer for the densest backplanes and compute boards — up to 36 layers and pushing higher-order, with aspect ratios over 20:1 and tight registration.
Key Capabilities
High layer count is a yield problem, not a spec sheet. As a high layer count PCB manufacturer, we build up to 36 layers — and actively push toward higher-order constructions — holding registration across every lamination cycle. Our process runs sequential lamination, blind and buried vias, aspect ratios over 20:1, and minimum 2.5/2.5 mil line and space, on high-Tg FR-4, Megtron and mixed-dielectric stacks. Every build is held to IPC Class 3 / mil-spec, with controlled impedance to ±8%. We're built for low-volume, fast-turn prototypes and complex small runs — the dense multilayer work high-volume houses avoid.
Technical Specifications
Verified production capability limits. ● = maximum achievable spec.
| Parameter | Value |
|---|---|
| Layer count | Up to 36 (pushing higher-order) layers ● |
| Aspect ratio | Over 20:1 ● |
| Blind / buried vias | Yes (sequential lamination) |
| Min line width / space | 2.5 / 2.5 mil ● |
| Hole position tolerance | ±0.025 mm |
| Min mechanical drill | 0.15 mm |
| Max board thickness | Over 6.3 mm |
| Impedance control | ±8% (±5 Ω at ≤50 Ω) |
| Materials | High-Tg FR-4, Megtron 6/7, Rogers, mixed-dielectric |
| Acceptance | IPC Class 3 / mil-spec |
Engineering Highlights
- Up to 36 layers
Tight layer-to-layer registration across every lamination cycle.
- Over 20:1 aspect ratio
For thick, high-density multilayer builds.
- Sequential lamination
Blind and buried vias through multi-cycle lamination.
- Controlled impedance to ±8%
Held across the full stack.
Why it's hard
Every added layer compounds registration error and drilling aspect ratio. Yield comes from process control, not equipment alone.
How we build it
Sequential lamination, high-aspect drilling and plating, and fine-line imaging in-house, held to IPC Class 3, with impedance coupons on every high-layer lot.
Applications
Backplanes, servers, switches and routers, aerospace and defense computing, test and measurement, and high-channel-count instrumentation.
Material Selection
High-layer boards usually start with high-Tg, CAF-resistant FR-4, and move to low-loss laminates when the stack carries high-speed signals. As a guide (we confirm exact material and availability with your design):
- Isola 370HR — Tg 180 °C, halogen-free, strong CAF resistance; a workhorse for industrial / automotive / server backplanes.
- Isola IS410 / FR408HR — high-Tg with a low-loss option for mixed digital stacks.
- Ventec VT-47 / VT-57 — Tg 180–190 °C, high heat resistance for automotive / power and high-reliability builds.
- Nelco N4000-13EP — low Dk/Df, high-Tg for datacom / base-station boards.
- Domestic equivalents — Shengyi S1000-2M / S6G (cost-effective, certified second source).
Design & DFM
- Keep the stackup balanced and symmetric — asymmetry bows thick boards in reflow.
- Confirm drilled aspect ratio against board thickness early.
- Plan blind/buried via spans by lamination sub-assembly.
- Reference controlled-impedance signals to continuous planes across the stack.
Proven
Built to IPC Class 3 / mil-spec with impedance coupons on every high-layer lot.
Beyond the datasheet
For layer counts or aspect ratios past our standard window, our engineers co-develop a manufacturable stackup with your team rather than declining.
Industries We Serve
Frequently Asked Questions
Related Capabilities
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