Tier 1 — Documented
40-Layer Any-Layer HDI Line Card for Optical Transport
Specifications
| Parameter | Value |
|---|---|
| Layers | 40 |
| Min BGA pitch | 0.40 mm |
| Surface finish | ENEPIG |
| Data rate | 112 Gbps |
Project Background
A telecommunications customer needed a 40-layer any-layer HDI line card for an optical transport system, integrating dense FPGA fan-out with 112G SerDes channels. The design required stacked microvias for 0.4 mm BGA escape and tight impedance control across the full stack.
Engineering Highlights
- Any-layer 40-layer build — Stacked microvias on every layer enabled full BGA escape on multiple 0.4 mm pitch devices.
- 112G channel integrity — Low-loss laminate and back-drilling preserved signal integrity on 112G SerDes links.